QCA-Based PIPO and SIPO Shift Registers Using Cost-Optimized and Energy-Efficient D Flip Flop

With the growing use of quantum-dot cellular automata (QCA) nanotechnology, digital circuits designed at Nanoscale have a number advantages over CMOS devices, including lower utilization power, increased processing speed circuit, and higher density. There are several flip flop designs proposed in literature with their realization QCA technology. However, majority these suffer from large cell counts, area utilization, latency, which leads to high cost circuits. To address this, this work performed survey D (DFF) complex sequential that can be it. A new design was assess performance design, an in-depth comparison existing performed. Further, such as parallel-in-parallel-out (PIPO) serial-in-parallel-out (SIPO) shift registers were using put forward. comprehensive evaluation energy dissipation all presented fundamental flip-flop other also QCAPro tool, maps obtained. The suggested showed power cost-efficient, making them suitable for designing higher-power